#include <IOKit/IORangeAllocator.h>
#include <IOKit/pci/IOPCIDevice.h>
/* Definitions of Capabilities PCI Config Register */
enum {
    kIOPCICapabilityIDOffset		= 0x00,		//0x0030 0002
    kIOPCINextCapabilityOffset		= 0x01,

    kIOPCIPowerManagementCapability	= 0x01,
    kIOPCIAGPCapability        		= 0x02,
    kIOPCIVitalProductDataCapability    = 0x03,
    kIOPCISlotIDCapability       	= 0x04,
    kIOPCIMSICapability       		= 0x05,
    kIOPCICPCIHotswapCapability       	= 0x06,
    kIOPCIPCIXCapability       		= 0x07,
    kIOPCILDTCapability       		= 0x08,
    kIOPCIVendorSpecificCapability      = 0x09,
    kIOPCIDebugPortCapability       	= 0x0a,
    kIOPCICPCIResourceControlCapability = 0x0b,
    kIOPCIHotplugCapability       	= 0x0c,
    kIOPCIAGP8Capability       		= 0x0e,
    kIOPCISecureCapability       	= 0x0f,
    kIOPCIPCIExpressCapability       	= 0x10,
    kIOPCIMSIXCapability       		= 0x11,

    kIOPCIExpressErrorReportingCapability     = -1UL,
    kIOPCIExpressVirtualChannelCapability     = -2UL,
    kIOPCIExpressDeviceSerialNumberCapability = -3UL,
    kIOPCIExpressPowerBudgetCapability        = -4UL
};

/* Definitions of AGP config registers */
enum {
    kIOPCIConfigAGPStatusOffset	 = 4,
    kIOPCIConfigAGPCommandOffset = 8
};

/* Definitions of AGP Command & Status registers */
enum {
    kIOAGPRequestQueueMask	= 0xff000000,
    kIOAGPSideBandAddresssing	= 0x00000200,
    kIOAGPEnable		= 0x00000100,
    kIOAGP4GbAddressing		= 0x00000020,
    kIOAGPFastWrite		= 0x00000010,
    kIOAGP4xDataRate		= 0x00000004,
    kIOAGP2xDataRate		= 0x00000002,
    kIOAGP1xDataRate		= 0x00000001
};

enum {
    kIOAGPGartInvalidate	= 0x00000001
};

// getAGPStatus() defines
enum {
    kIOAGPDefaultStatus		= 0
};
enum {
    kIOAGPIdle			= 0x00000001,
    kIOAGPInvalidGARTEntry	= 0x00000002,
    kIOAGPAccessOutOfRange	= 0x00000004
};

#define kIOAGPBusFlagsKey	"IOAGPFlags"
enum {
    // the AGP target must be idle before invalidating its gart tlb
    kIOAGPGartIdleInvalidate	= 0x00000001,

    // the AGP target cannot handle operations that cross page boundaries
    kIOAGPDisablePageSpans	= 0x00000002,

    // the AGP target cannot handle master -> target AGP writes
    kIOAGPDisableAGPWrites	= 0x00000004,

    // the AGP target cannot handle target -> master PCI reads
    kIOAGPDisablePCIReads	= 0x00000008,

    // the AGP target cannot handle master -> target PCI writes
    kIOAGPDisablePCIWrites	= 0x00000010,

    // the AGP target cannot handle all unaligned transactions 
    kIOAGPDisableUnaligned	= 0x00000020,

    kIOAGPDisableFeature6	= 0x00000040,
    kIOAGPDisableFeature7	= 0x00000080,
    kIOAGPDisableFeature8	= 0x00000100,
    kIOAGPDisableFeature9	= 0x00000200
};

// masterState
enum {
    kIOAGPStateEnabled		= 0x00000001,
    kIOAGPStateEnablePending	= 0x00010000
};
/* Definitions of PCI Config Registers */
enum {
    kIOPCIConfigVendorID		= 0x00,
    kIOPCIConfigDeviceID		= 0x02,
    kIOPCIConfigCommand			= 0x04,
    kIOPCIConfigStatus			= 0x06,
    kIOPCIConfigRevisionID		= 0x08,
    kIOPCIConfigClassCode		= 0x09,
    kIOPCIConfigCacheLineSize		= 0x0C,		//0
    kIOPCIConfigLatencyTimer		= 0x0D,		//0x20
    kIOPCIConfigHeaderType		= 0x0E,
    kIOPCIConfigBIST			= 0x0F,
    kIOPCIConfigBaseAddress0		= 0x10,
    kIOPCIConfigBaseAddress1		= 0x14,
    kIOPCIConfigBaseAddress2		= 0x18,
    kIOPCIConfigBaseAddress3		= 0x1C,
    kIOPCIConfigBaseAddress4		= 0x20,
    kIOPCIConfigBaseAddress5		= 0x24,
    kIOPCIConfigCardBusCISPtr		= 0x28,
    kIOPCIConfigSubSystemVendorID	= 0x2C,		//0x144d
    kIOPCIConfigSubSystemID		= 0x2E,			//0x0b28
    kIOPCIConfigExpansionROMBase	= 0x30,
    kIOPCIConfigCapabilitiesPtr		= 0x34,		//0xa0
    kIOPCIConfigInterruptLine		= 0x3C,		//00000000	000c00ff
    kIOPCIConfigInterruptPin		= 0x3D,
    kIOPCIConfigMinimumGrant		= 0x3E,
    kIOPCIConfigMaximumLatency		= 0x3F
};


//Slice 
#define ATI_COMMAND			0x04
#define ATI_RS_MEM_BASE		0x10
#define ATI_RS_IO_BASE		0x14
#define ATI_MEM_RANGE_1		0x24
#define ATI_IO_RANGE_1		0x20
#define ATI_RAM_SIZE		0x90
#define ATI_AGP_MODE_PTR	0x9c
#define ATI_PCI_STATE		0x06		bit 4 = 1 cap_ptr presents	//0x2230 - OK!

// From agp21_ati
/*
 * ATI IGP registers
 */
#define ATI_GART_MMADDR		0x14		//0xdc000000
#define ATI_RS100_APSIZE	0xac
#define ATI_RS100_IG_AGPMODE	0xb0
#define ATI_RS300_APSIZE	0xf8		//0x3	->0xb4
#define ATI_RS300_IG_AGPMODE	0xfc	//0x0
#define ATI_GART_FEATURE_ID	0x00		// ->0xa0 ?
#define ATI_GART_BASE		0x04		// ->0xb8
#define ATI_GART_CACHE_CNTRL	0x0c	// ->0xac ?

//From agp3.pdf Registers in PCI space
#define APBASE			0x10			//0xe0000008	0	8=prefetchable 32bit access

#define CAPABILITY_PTR	0x34			//0xa0			0

// Then shift in AGP space
#define AGP_ID				0x00		//0x00300002	0x00162610	10=AGP_BUS	26=next CAP
#define AGP_STAT			0x04		//0x1f00021b	0x3e040f3c	RQ=32 ISOCH=0 ARQSZ=0 SBA=1 ITACOH=0 FW=1 AGP3.0 8x htrans=0
#define AGP_CMD				0x08		//0x00000200	00000000  SBA enabled
#define AGP_CNTRL			0x10		//0x0			0 bits 7,8 needed
#define APSIZE				0x14		//0x0f30 = 64Mb
#define NEPG				0x16		//0
#define ATTBASE_lo			0x18		//0
#define ATTBASE_hi			0x1c		//0
PCI_status (06) =CAPPRESENT+66CAPABLE+SEL_MEDIMUM+RMABORT (MEM_ENABLE+BUSMASTER_ENABLE)
	agp1		=66CAPABLE+SEL_MEDIMUM


Reg		16M-AGP0	16M-AGP1 |	32M-AGP0	32M-AGP1 |	64M-AGP0	64M-AGP1 |	128M-AGP0	128M-AGP1	left 2byte	right 2	(memory_dep)	
____________________________________________________________________________________________________
(00)=	58311002	58381002 |	58311002	58381002 |	58311002	58381002 |	58311002	58381002	DevID	VenId	
(04)=	22300006	02200007	22300006	02200007	22300006	02200007	22300006	02200007	Status	Command	
(08)=	06000002	06040000	06000002	06040000	06000002	06040000	06000002	06040000	ClassCode	Revision	
(0c)=	00002000	00016300	00002000	00016300	00002000	00016300	00002000	00016300	BIST_HEADER	Cache_CNTRL	
(10)=	e0000008	00000000	e0000008	00000000	dc000008	00000000	c4000008	00000000	MEM_BASE	
(14)=	dc000000	00000000	dc000000	00000000	d8000000	00000000	c0000000	00000000	IO_BASE	
(18)=	00000000	24010100	00000000	24010100	00000000	24010100	00000000	24010100	REG_BASE	
(1c)=	00000000	22209191	00000000	22209191	00000000	22209191	00000000	22209191	
(20)=	00000000	dc10dc10	00000000	dc10dc10	00000000	d810d810	00000000	c010c010	IO_RANGE_1
(24)=	00000000	e7f0e400	00000000	e7f0e400	00000000	e7f0e000	00000000	dff0d000	MEM_RANGE_1
(28)=	00000000	00000000	00000000	00000000	00000000	00000000	00000000	00000000	
(2c)=	b028144d	58381002	b028144d	58381002	b028144d	58381002	b028144d	58381002	SUBSYSTEM_DevID	SUB_VenID	
(30)=	00000000	00000000	00000000	00000000	00000000	00000000	00000000	00000000	BIOS_ROM Expansion	
(34)=	000000a0	00000000	000000a0	00000000	000000a0	00000000	000000a0	00000000	(PCI_Capability) pointer
(38)=	00000000	00000000	00000000	00000000	00000000	00000000	00000000	00000000	
(3c)=	00000000	000c00ff	00000000	000c00ff	00000000	000c00ff	00000000	000c00ff	Interrupt_Pin	Interrupt_Line	
(40)=	64110000	00000000	64110000	00000000	64110000	00000000	64110000	00000000	
(44)=	00000308	00000000	00000308	00000000	00000308	00000000	00000308	00000000	
(48)=	00000000	00000000	00000000	00000000	00000000	00000000	00000000	00000000	
(4c)=	00002d04	58381002	00002d04	58381002	00002d04	58381002	00002d04	58381002	Adapter_ID	
(50)=	b028144d	00000000	b028144d	00000000	b028144d	00000000	b028144d	00000000	SUBSYSTEM_ID	
(54)=	80003581	00000000	80003581	00000000	80003581	00000000	80003581	00000000	PMI_DATA	PM_Status?	
(58)=	11111000	00000000	11111000	00000000	11111000	00000000	11111000	00000000	CAP_ID	?
(5c)=	11130011	00000000	11130011	00000000	11130011	00000000	11130011	00000000	CAP_Status	?
(60)=	00000cb5	ffc70080	00000cb5	ffc70080	00000cb5	ffc70080	00000cb5	ffc70080	CAP_Command	?
(64)=	7ee22624	000000ff	7ee22624	000000ff	7ee22624	000000ff	7ee22624	000000ff	CAP_CNTRL ?
(68)=	00250a00	dfffffff	00250a00	dfffffff	00250a00	dfffffff	00250a00	dfffffff	
(6c)=	470b0025	ffffffff	470b0025	ffffffff	470b0025	ffffffff	470b0025	ffffffff	
(70)=	306009e1	9d089d08	306009e1	9d089d08	306009e1	9d089d08	306009e1	9d089d08	
(74)=	86868686	02080208	86868686	02080208	86868686	02080208	86868686	02080208	
(78)=	20030808	08180616	20030808	08180616	20030808	08180616	20030808	08180616	
(7c)=	c0300380	67160761	c0300380	67160761	c0300380	67160761	c0300380	67160761	
(80)=	00000000	00000000	00000000	00000000	00000000	00000000	00000000	00000000	
(84)=	00831092	00000000	00831092	00000000	00831092	00000000	00831092	00000000	
(88)=	00100030	00000000	00100030	00000000	00100030	00000000	00100030	00000000	
(8c)=	50002022	0000f618	50002022	0000f618	50002002	0000f618	50002012	0000f618	
(90)=	0f000000	00000000	0e000000	00000000	0c000000	00000000	08000000	00000000	RAM_SIZE	
(94)=	0f070f07	00000000	0e080e08	00000000	0e080e08	00000000	0f070f07	00000000	
(98)=	00080000	00000000	00080000	00000000	00080000	00000000	00080000	00000000	
(9c)=	000000a4	00000000	000000a4	00000000	000000a4	00000000	000000a4	00000000	(AGP_MODE) pointer
(a0)=	00300002	00163610	00300002	00163610	00300002	00163610	00300002	00163610	AGP_ID
(a4)=	1f00021b	3e040f3c	1f00021b	3e040f3c	1f00021b	3e040f3c	1f00021b	3e040f3c	AGP_STATUS
(a8)=	00000200	00000000	00000200	00000000	00000200	00000000	00000200	00000000	AGP_CMD
(ac)=	00000000	16b10a20	00000000	16b10a20	00000000	16b10a20	00000000	16b10a20	
(b0)=	00000000	00000000	00000000	00000000	00000000	00000000	00000000	00000000	AGP_CTRL
(b4)=	00000f30	00000000	00000f30	00000000	00000f30	00000000	00000f30	00000000	APSIZE
(b8)=	00000000	00000000	00000000	00000000	00000000	00000000	00000000	00000000	GART_LO, (bc)=hi
(d0)=	000f6002	00000000	000f6002	00000000	000f6002	00000000	000f6002	00000000	
(d4)=	004fff2b	00000000	004fff2b	00000000	004fff2b	00000000	004fff2b	00000000	
(d8)=	5060006a	00000000	5060006a	00000000	5060006a	00000000	5060006a	00000000	
(e4)=	00400000	00000000	00400000	00000000	00400000	00000000	00400000	00000000	
(e8)=	0000001b	00000000	0000001b	00000000	0000001b	00000000	0000001b	00000000	
(ec)=	00000404	00000000	00000404	00000000	00000404	00000000	00000404	00000000	
(f0)=	0009000f	00000000	0009000b	00000000	0009000f	00000000	0009000b	00000000	BIOS
(f4)=	00000000	00000000	00000000	00000000	00000000	00000000	00000000	00000000	
(f8)=	00000003	00000000	00000003	00000000	00000003	00000000	00000003	00000000	
(fc)=	00000000	00000000	00000000	00000000	00000000	00000000	00000000	00000000	


